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Department of Computer Science

Book: Section Numbers Refer to the 2nd Edition

Slides:

  • ppt/pptm: This is the type of the master slides. This is the recommended file format. Users without a PowerPoint license should use the free PowerPoint viewer from Microsoft, if they are running Windows. Slides have been generated with PowerPoint 2010 (pptm) or XP (ppt).
  • pdf: These files have been generated with Adobe Distiller, the pdf-export function of Powerpoint 2010 or pdf-annotator. No animation is available.

Teaching Style

We recommend trying out flipped classroom teaching:

  • ask the students to study the videos for the next meeting at home,
  • during the meeting, remind the students very briefly about the topic of the meeting
  • distribute worksheets, let the students work in groups on the worksheets, discuss the results (about 3 worksheets per 90 min. meeting)
  • provide brief preview of the topic of the next meeting.
Content Book Section Videos Slides Simulators Lectures
Preface: Embedded and Cyber-Physical Systems (definitions), motivation Preface 01.1 es-marw-1.1.pptm
es-marw-1.1.pdf
  1
Introduction: application areas, examples, educational concept 1.1, preface 01.2     1
Introduction: Common characteristics 1.2 01.3 es-marw-1.2.pptm
es-marw-1.2.pdf 
  1
Introduction: Challenges in embedded system design 1.3 02.1     2
Introduction: design flows 1.4 02.2     2
Specifications and Modeling: Requirements, models of computation 2.1-2.2 02.3 es-marw-2.01-moc.ppt
es-marw-2.01-moc.pdf
  3
Specifications and Modeling: The oberver pattern, a case against imperative specifications (based on E. Lee) 2.1 03.1


es-marw-2.02-sc.ppt
es-marw-2.02-sc.pdf
  3
Specifications and Modeling: Early design phases: text, use cases, time-distance charts, sequence charts 2.3 03.2   Time-Distance Charts - Animation 3
Specifications and Modeling: Communicating finite state machines (CFSMs): Timed automata 2.4.1 03.3     3
Specifications and Modeling: State charts: implicit shared memory communication, modelling of hierarchy 2.4.2.1 04.1

es-marw-2.03-fsm.ppt
es-marw-2.03-fsm.pdf
  4
Specifications and Modeling: State charts timers and semantics, synchronous languages 2.4.2.2, 2.4.2.3, 2.4.3 04.2     4
Specifications and Modeling: SDL: A case of message passing 2.4.4 05.1 es-marw-2.04-sdl-df.ppt
es-marw-2.04-sdl-df.pdf
  5
Specifications and Modeling: dataflow: scope, Kahn process networks (KPN) 2.5.1-2.5.2 05.2   Animation 5
Specifications and Modeling: dataflow: synchronous (or "static") data flow, SDF, Simulink, RTW, Labview 2.5.3 05.3     5
Specifications and Modeling: Petri nets: Introduction 2.6.1 06.1 es-marw-2.05-petri.ppt
es-marw-2.05-petri.pdf 
  6
Specifications and Modeling: Petri nets: condition/event nets  2.6.2  06.2     6
Specifications and Modeling: Petri nets: place transition nets 2.6.3 06.3     6
Specifications and Modeling: Petri nets: predicate/transition nets, evaluation 2.6.4, 2.6.5 06.4     6
Specifications and Modeling: Discrete Event Modelling, VHDL 2.7.1.1-2.7.1.4 07.1 es-marw-2.06-discrete-event.ppt
es-marw-2.06-discrete-event.pdf 
  7
Specifications and Modeling: Discrete Event Modelling, IEEE 1164 2.7.1.5 07.2     7
Specifications and Modeling: Imperative (or von Neumann) model of computation, Comparison of models 2.8 08.1 es-marw-2.07-imperative-wrap.ppt
es-marw-2.07-imperative-wrap.pdf
  8
Specifications and Modeling: comparison of models of computation 2.10 08.2     8
ES-Hardware: Sensors 3.2.1 09.1 es-marw-3.1-sensors-ad.ppt
es-marw-3.1-sensors-ad.pdf
  9
ES-Hardware: discretization of time: sample-and-hold circuits 3.2.2 09.2     9
ES-Hardware: discretization of values: A/D-converters 3.2.2 09.3     9
ES-Hardware: discretization: quantization noise, aliasing    09.4   Java program available  9
ES-Hardware: Processing, code-size efficiency 3.3.1, 3.3.2, 3.3.3 10.1 es-marw-3.2-processing.ppt
es-marw-3.2-processing.pdf
  10
ES-Hardware: Run-time efficiency, DSP,  Multimedia processors, SIMD 3.3.3.0-3.3.3.2 10.2     10
ES-Hardware: very long instruction word (VLIW) machines, microcontrollers, Multiprocessor systems on a chip (MPSoCs), 3.3.3.3, 3.3.3.4, 3.3.3.5 11.1     11
ES-Hardware: Reconfigurable logic, Field programmable gate arrays (FPGAs) 3.3.4 11.2 es-marw-3.3-fpga-mem.ppt
es-marw-3.3-fpga-mem.pdf
  11
ES-Hardware: Memories 3.4 11.3     11
ES-Hardware: Communication 3.5 12.1 es-marw-3.4-comm-da-actuator.ppt
es-marw-3.4-comm-da-actuator.pdf
Animation 12
ES-Hardware: Output: D/A-Converter  3.6.1 12.2     12
ES-Hardware: Sampling theorem, actuators, secure hardware 3.6.2, 3.6.3, 3.7 12.3     12
System Software: Embedded operating systems, real-time operating systems 4.1.1, 4.1.2 13.1 es-marw-4.1-rtos.ppt
es-marw-4.1-rtos.pdf
  13
System Software: Virtual machines - - -    
System Software: Resource access protocols (Priority inversion and inheritance) 4.1.4 13.2 es-marw-4.1-rtos.ppt
es-marw-4.1-rtos.pdf
Animation 13
System Software: Resource access protocols (Priority ceiling, stack resource policy) - - es-marw-4.2-rtos.ppt
es-marw-4.2-rtos.pdf
  14
System Software: ERIKA, hardware abstraction layers, middleware, real-time data bases 4.2, 4.3, 4.4, 4.5 14.1     14
Evaluation and Validation: Scope, multi-objective optimization, relevant objectives 5.1 14.2   es-marw-5.1-evaluation.ppt
es-marw-5.1-evaluation.pdf
  14
Evaluation and Validation: performance evaluation (early estimation & worst case execution time analysis), prerequisite: integer linear programming 5.2.1, 5.2.2   es-marw-5.1-evaluation.ppt
es-marw-5.1-evaluation.pdf 
es-marw-9.1-optimizations.ppt
es-marw-9.1-optimizations.pdf
  15
Evaluation and Validation: real-time calculus 5.2.3 15.1 es-marw-5.2-evaluation.ppt
es-marw-5.2-evaluation.pdf
  15
Evaluation and Evaluation: Energy and power models, thermal models 5.3, 5.4 15.2     16
Evaluation and Evaluation: Risk- and dependability analysis 5.5 16.1 es-marw-5.3-evaluation.ppt
es-marw-5.3-evaluation.pdf
  17
Validation and Evaluation: Simulation, rapid prototyping and emulation, formal verification (briefly) 5.6, 5.7, 5.8 16.2     17
Application mapping: problem definition, classification of scheduling systems  6.1, 6.2.1 17.1 es-marw-6.1-aperiodic.ppt
es-marw-6.1-aperiodic.pdf
  18
Application mapping: Aperiodic scheduling without precedence constraints 6.2.2 17.2    Animation 18
Application mapping: Aperiodic scheduling with precedence constraints 6.2.3   es-marw-6.2-hls-scheduling.ppt
es-marw-6.2-hls-scheduling.pdf
  19
Application mapping: Periodic scheduling without precendence constraints 6.2.4 18.1 es-marw-6.3-periodic.ppt
es-marw-6.3-periodic.pdf 
Animation 19
Application mapping: Periodic scheduling with precendence constraints, sporadic events 6.2.5, 6.2.6       20
Application mapping: Hardware/Software Partitioning 6.3 18.2 es-marw-6.4-cool.ppt
es-marw-6.4-cool.pdf
  20
Application mapping: Mapping of Applications to Multi-Processor Systems 6.4   es-marw-6.5-mp-mapping.ppt
es-marw-6.5-mp-mapping.pdf
  21
Optimizations: task concurrency management, floating-point, high-level loop transformations 7.1, 7.2,    es-marw-7.1-optimizations.ppt
es-marw-7.1-optimizations.pdf 
  22
Optimizations:
SPM, allocation strategies
7.3   es-marw-7.2-optimizations.ppt
es-marw-7.2-optimizations.pdf
  23
Optimizations:
optimizations for caches, offset assignment problem
    es-marw-7.3-optimizations.ppt
es-marw-7.3-optimizations.pdf
  24
Optimizations:
additional compiler optimizations, dynamic voltage scaling
7.4   es-marw-7.4-optimizations.ppt
es-marw-7.4-optimizations.pdf
  25
Test 8   es-marw-8-test.ppt
es-marw-8-test.pdf​​​​​​​
  26